The present invention relates to a method for etching polycide structures on semiconductor substrates.
In integrated circuit fabrication, refractory metal silicides, such as for example tungsten, tantalum, titanium, and molybdenum silicides, are used to form high density, high speed, highly electrically conductive interconnect features and lines for electrically connecting devices formed on semiconductor substrates. For example, WSi.sub.x layers can be deposited on silicon dioxide to serve as gate electrodes for integrated circuits. However, at the silicide and oxide interface, diffusion of silicon from the SiO.sub.2 layer into the refractory metal silicide layer causes the metal silicide layer to have unacceptably high electrical resistance. "Polycide" stacks were developed to reduce the diffusion problems with metal silicide layers. With reference to FIGS. 1a through 1d, typical polycide structures on a semiconductor substrate 20 comprise refractory metal silicide layers 22, 22a, 22b (which are used interchangeably herein to designate metal silicide layers) deposited over doped or undoped polysilicon layers 24, 24a, or 24b (which are used interchangeably herein to designate polysilicon layers). The polycide structures are formed over silicon dioxide layers 26, 26a, or 26b (which are used interchangeably herein to designate silicon dioxide layers) on the substrate 20, and provide a low electrical resistance interconnect with excellent interfacial characteristics.
In conventional methods of fabricating the polycide interconnect structures, the metal silicide layers 22 are deposited over polysilicon layers 24. For example, commonly assigned U.S. Pat. No. 5,500,249, to Telford et al., incorporated herein by reference, describes a chemical vapor deposition process for depositing WSi.sub.x films on polysilicon via plasma enhanced chemical vapor deposition of tungsten hexafluoride and dichlorosilane. After deposition of the metal silicide layer 22, photoresist material is applied on the polycide layers and exposed to light to form a desired pattern of interconnect features using conventional photolithographic processes. The patterned resist 30 serves as a mask for etching of the polycide structure using conventional etching processes to provide the shape of the etched feature 40 illustrated in FIG. 1b. Thereafter, the deposition and etching process can be repeated to form additional layers of polycide stacks, as illustrated in FIGS. 1c and 1d.
Conventional etching processes use a microwave or capacitive plasma of halogen-containing gases to etch the polycide stack of layers. Commonly used fluorinated etchant gases include CF.sub.4, SF.sub.6, and NF.sub.3 ; chlorine-containing etchant gases include Cl.sub.2 and BCl.sub.3 ; and bromine-containing etchant gases include HBr. One problem conventional etching processes is their relative inability to provide high etching selectivity ratios for etching metal silicide with respect to polysilicon, while simultaneously forming anisotropically etched features, with good profile microloading. High profile microloading occurs when the cross-sectional profile of the etched features 40 vary as a function of the spacing between the etched features 40. This occurs when the passivating deposits (i.e., complex polymeric byproducts that deposit on the sidewalls of features and reduce etching of the sidewalls) formed on closely spaced or "dense" features are removed at higher rates than on the features separated by relatively large distances. This occurs because plasma ions are channeled between, and bounce-off, the sidewalls of the closely spaced features to excessively etch the passivating layer thereon. In contrast, etching of passivating deposits on sidewalls of spaced apart features is not as high because of reduced channeling effects. This results in high profile microloading with the cross-sectional shape of the features 40 varying as a function of the spacing between the features.
Etching selectivity ratio is the ratio of the rate of etching of the metal silicide layer 22 to the rate of etching of the underlying polysilicon layer 24. It is particularly desirable to have high etching selectivity ratios for polycide structures having a non-planar and highly convoluted topography, as schematically illustrated in FIG. 1c. In these structures, the portion of the conformal metal silicide layer 22b between the etched features as shown by the arrow A, is thicker than the portion of the metal silicide layer 22b on top of the etched features as shown by the arrow B. Thus, at a certain time during the etching process, at the portion B the metal silicide layer is etched through and etching of the underlying polysilicon layer begins, while at the portion A, the thicker metal silicide layer 22b is still being etched. This effect requires that the polysilicon layer 24b at the portion B be etched sufficiently slowly relative to the rate of etching of the silicide layer, that the entire polysilicon layer 24b at portion B is not etched through, before completion of etching of the thicker portions of the convoluted metal silicide layer 22b at portion A. Thus, it is desirable to etch the metal silicide layer 22b at a faster rate relative to the rate of etching of the polysilicon layer 24.
High etching selectivity ratios are obtained by using process gas compositions that etch different materials at different etching rates, depending upon the chemical reactivity of the process gas with the different materials. However, etching metal silicide with high selectivity to polysilicon is particularly difficult, because both materials contain elemental silicon and most conventional etchant plasmas etch the silicon portion to form gaseous SiCl.sub.x or SiF.sub.x species. Thus, it is difficult for the etchant plasma to chemically distinguish and preferentially etch the metal silicide layer 22 faster than the polysilicon layer 24. Also, the more chemically active plasma etching processes, such as ECR and/or microwave plasma processes, provide more dissociated chemically active etchant species, and result in isotropic etching of the silicide layers, as described below.
It is also desirable to etch the polycide stack to form anisotropically etched features 40, which result when the metal silicide and polysilicon layers are etched substantially vertically to provide features having straight sidewalls 48. Excessive etching at the sidewalls 48 of the etched features results in undesirable inwardly or outwardly sloped walls. A degree of anisotropic etching is obtained when dissociated species in the etchant gas combine to form complex polymeric byproducts that deposit as passivating layers on the sidewalls of freshly etched features 40, and serve to limit further etching of the sidewalls 48. More typically, anisotropic etching is obtained by imparting a highly directional kinetic energy to the charged species in the etchant plasma (by subjecting the plasma to an electric field perpendicular to the substrate 20), that causes the plasma species to energetically impinge upon and remove substrate material in the vertical etching direction. However, different materials are sputter etched by the highly energized plasma at the same etch rate providing little or no control over etching selectivity. For these reasons, it is difficult to obtain anisotropic etching in combination with high etching selectivity ratios for etching metal silicide on polysilicon.
Etchant gases compositions containing HBr are also often used to etch polycide structures. For example, U.S. Pat. No. 5,192,702 issued Mar. 9, 1993, incorporated herein by reference, discloses a method of anisotropically etching polysilicon using HBr, Cl.sub.2, and He--O.sub.2. However, the low vapor pressure of HBr causes contaminant HBr or Br-containing particles to condense upon the substrate 20. The contaminant particles absorb ambient moisture to form hydrobromic species that significantly affect the performance of the integrated circuit chip. Furthermore, many HBr gas compositions typically etch polysilicon faster than the metal silicide, for example the etching selectivity ratio of WSi.sub.x relative to polysilicon is typically about 0.7:1.
Multi-step etching processes that use different process gases for etching the different layers of material constituting the polycide structure have also been used. For example, U.S. Pat. No. 5,094,712 issued May 10, 1992, incorporated herein by reference, discloses a method of etching a polycide structure using (i) an oxide etching step using CHF.sub.3, CF.sub.4 and inert gas, (ii) a silicide etching step using He, O.sub.2, and SF.sub.6, (iii) a polysilicon etching step using HBr and Cl.sub.2. However, such multiple step processes reduce process throughput, because the process chamber has to be exhausted of residual process gas before each successive etching step. Also, it is relatively expensive to connect multiple sources of gas to the process chamber. Furthermore, multiple step etching processes require precise control to determine the endpoint of each etching step, and in particular, between the successive silicide and polysilicon etching steps.
Thus, it is desirable to have an etching process for etching polycide structures with high etching selectivity, and in particular, for etching metal silicide layers at faster etch rates than polysilicon. It is further desirable for the etching process to provide substantially anisotropic etching, and to provide uniform etching rates across the surface of the substrate. It is still further desirable to have an etching process that is substantially absent HBr etchant gas, and that can be performed in a single step.